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19 Aug 2014  |  maldomao   BREVE         

IBM SyNapse: IBM construye el primer chip neuromórfico

Hace un año escribí una entrada sobre la demostración (simulación) de una arquitectura computacional neuromórfica (que imita la computación neuronal) llamada TrueNorth que estaba desarrollando IBM.

Pues bien, hace unos días anunciaban en Science que esa investigación se ha convertido en el primer chip neuromórfico. Aunque no es aún un producto comercial es un chip con aplicación en problemas reales.

No voy a explicar la computación neuromórfica y sus ventajas de nuevo -ya lo hice en el artículo que enlazo arriba- pero este desarrollo puede ser revolucionario para algunas aplicaciones (relacionadas con el reconocimiento de patrones) por ser esta forma de procesar la información varios ordenes de magnitud más eficiente que la tradicional (Von Neumann).

En Technology Review cubren bien la noticia. Saco lo más notable:

The chip uses the same basic components as today’s commercial chips—silicon transistors. But its transistors are configured to mimic the behavior of both neurons and the connections—synapses—between them.

...

The new chip is not yet a product, but it is powerful enough to work on real-world problems. In a demonstration at IBM’s Almaden research center, MIT Technology Review saw one recognize cars, people, and bicycles in video of a road intersection. A nearby laptop that had been programed to do the same task processed the footage 100 times slower than real time, and it consumed 100,000 times as much power as the IBM chip. IBM researchers are now experimenting with connecting multiple SyNapse chips together, and they hope to build a supercomputer using thousands.

...

The just over one million neurons on the chip are organized into 4,096 identical blocks of 250, an arrangement inspired by the structure of mammalian brains, which appear to be built out of repeating circuits of 100 to 250 neurons

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Although the new SyNapse chip has more transistors than most desktop processors, or any chip IBM has ever made, with over five billion, it consumes strikingly little power. When running the traffic video recognition demo, it consumed just 63 milliwatts of power. Server chips with similar numbers of transistors consume tens of watts of power—around 10,000 times more.

The efficiency of conventional computers is limited because they store data and program instructions in a block of memory that’s separate from the processor that carries out instructions. As the processor works through its instructions in a linear sequence, it has to constantly shuttle information back and forth from the memory store—a bottleneck that slows things down and wastes energy.

IBM’s new chip doesn’t have separate memory and processing blocks, because its neurons and synapses intertwine the two functions. And it doesn’t work on data in a linear sequence of operations; individual neurons simply fire when the spikes they receive from other neurons cause them to.

...

The new chip “may be a historic development,” he says. “The very low power consumption and scalability of this architecture are really unique.”

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